LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 236

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.2
Read: Anytime
Write: Never
4.3.1.3
Read: Anytime
Write: Never
236
Address: Module Base + 0x0001
Address: Module Base + 0x0002
ADDR[22:16]
ADDR[15:8]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
6–0
7–0
W
W
R
R
MPU Address Status Register 0 (MPUASTAT0)
MPU Address Status Register 1 (MPUASTAT1)
Access violation address bits — The ADDR[22:16] bits contain bits [22:16] of the global address which
caused the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the
MPUFLG register is not set.
Access violation address bits — The ADDR[15:8] bits contain bits [15:8] of the global address which caused
the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the MPUFLG
register is not set.
0
0
0
7
7
Figure 4-4. MPU Address Status Register 0 (MPUASTAT0)
Figure 4-5. MPU Address Status Register 1 (MPUASTAT1)
0
0
6
6
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 4-4. MPUASTAT0 Field Descriptions
Table 4-5. MPUASTAT1 Field Descriptions
5
0
5
0
0
0
4
4
ADDR[15:8]
Description
Description
ADDR[22:16]
0
0
3
3
2
0
2
0
Freescale Semiconductor
0
0
1
1
0
0
0
0

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