UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 19

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION .........................783
CHAPTER 22 KEY INTERRUPT FUNCTION ......................................................................................822
20.7 DMA Channel Priorities ..........................................................................................................770
20.8 Time Related to DMA Transfer ..............................................................................................771
20.9 DMA Transfer Start Factors ...................................................................................................772
20.10 DMA Abort Factors .................................................................................................................773
20.11 End of DMA Transfer ..............................................................................................................773
20.12 Operation Timing ....................................................................................................................773
20.13 Cautions...................................................................................................................................778
21.1 Features ...................................................................................................................................783
21.2 Non-Maskable Interrupts........................................................................................................787
21.3 Maskable Interrupts ................................................................................................................792
21.4 Software Exception.................................................................................................................806
21.5 Exception Trap ........................................................................................................................809
21.6 Multiple Interrupt Servicing Control .....................................................................................813
21.7 External Interrupt Request Input Pins (NMI, INTP0 to INTP7) ............................................814
21.8 Interrupt Response Time of CPU ..........................................................................................820
21.9 Periods in Which Interrupts Are Not Acknowledged by CPU ............................................821
21.10 Cautions...................................................................................................................................821
22.1 Function ...................................................................................................................................822
22.2 Pin Functions ..........................................................................................................................823
22.3 Registers..................................................................................................................................823
22.4 Cautions...................................................................................................................................824
21.2.1
21.2.2
21.2.3
21.3.1
21.3.2
21.3.3
21.3.4
21.3.5
21.3.6
21.3.7
21.3.8
21.4.1
21.4.2
21.4.3
21.5.1
21.5.2
21.7.1
21.7.2
21.10.1 Restored PC.............................................................................................................................. 821
Operation .................................................................................................................................. 789
Restoration ................................................................................................................................ 790
NP flag ...................................................................................................................................... 791
Operation .................................................................................................................................. 792
Restoration ................................................................................................................................ 794
Priorities of maskable interrupts ................................................................................................ 795
Interrupt control register (xxICn)................................................................................................ 799
Interrupt mask registers 0 to 3 (IMR0 to IMR3) ......................................................................... 801
In-service priority register (ISPR) .............................................................................................. 804
ID flag........................................................................................................................................ 805
Watchdog timer mode register 2 (WDTM2) ............................................................................... 805
Operation .................................................................................................................................. 806
Restoration ................................................................................................................................ 807
EP flag....................................................................................................................................... 808
Illegal opcode ............................................................................................................................ 809
Debug trap ................................................................................................................................ 811
Noise elimination ....................................................................................................................... 814
Edge detection .......................................................................................................................... 814
User’s Manual U18953EJ5V0UD
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