UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 606

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.6.2 UART transmission
started by writing transmit data to the UC0TX register. The start bit, parity bit, and stop bit are automatically added.
enabled at the transmit destination.
of the UC0TX register to the UARTC0 transmit shift register, and the contents of the UARTC0 transmit shift register
are output to the TXDC0 pin.
604
Transmission is enabled by setting the UC0CTL0.UC0PWR and UC0CTL0.UC0TXE bits to 1, and transmission is
Since the CTS (transmit enable signal) input pin is not provided in UARTC0, use a port to check that reception is
The data in the UC0TX register is transferred to the UARTC0 transmit shift register upon the start of transmission.
A transmission enable interrupt request signal (INTUC0T) is generated upon completion of transmission of the data
Writing the next transmit data to the UC0TX register is enabled after the INTUC0T signal is generated.
Remark
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC) (
TXDC0
INTUC0T
LSB first
Start
bit
D0
Figure 17-4. UART Transmission
D1
User’s Manual U18953EJ5V0UD
D2
D3
D4
D5
D6
D7
PD70F3792, 70F3793)
Parity
bit
Stop
bit