UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 990

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
33.4 Oscillator Characteristics
33.4.1 Main clock oscillator characteristics
(1) Main clock oscillator characteristics
Notes 1. The oscillation frequency shown above indicates only oscillator characteristics. Use the V850ES/JG3-L so
Caution 1. When using the main clock oscillator, wire as follows in the area enclosed by the broken lines in
988
Ceramic
resonator/
Crystal
resonator
Resonator
(T
A
2. The wait time required from when the resonator starts oscillating until oscillation stabilizes.
3. The oscillation stabilization time after reset release is restricted in accordance with the set value of the
4. The oscillation stabilization time differs depending on the set value of the option byte. For details, see
5. Time required to set up the regulator and flash memory. Secure the setup time using the OSTS register.
6. The value varies depending on the setting of the OSTS register.
7. Time required to set up the regulator, flash memory, and PLL. Secure the setup time using the OSTS
= −40 to +85°C, V
that the internal operating conditions do not exceed the ratings shown in AC Characteristics, DC
Characteristics, and Operating Conditions.
option byte. For details, see CHAPTER 29 OPTION BYTE.
CHAPTER 29 OPTION BYTE.
register.
the above figure to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
Circuit Example
X1
CHAPTER 33 ELECTRICAL SPECIFICATIONS (Target) (
DD
= EV
X2
DD
= AV
Oscillation frequency
(f
Oscillation
stabilization
time
X
)
Note 1
Note 2
REF0
Parameter
= AV
User’s Manual U18953EJ5V0UD
REF1
, V
SS
Clock through
mode
V
V
after reset ends
After STOP
mode is
released
After IDLE2
mode is
released
DD
DD
= EV
= 2.7 to 3.6 V in PLL mode
= 2.0 to 3.6 V immediately
SS
= AV
Conditions
V
V
V
V
V in clock
through mode
V
V in PLL mode
V
V in clock
through mode
V
V in PLL mode
SS
DD
DD
DD
DD
DD
DD
DD
= 0 V)
= 2.7 to 3.6 V
= 2.0 to 3.6
= 2.7 to 3.6
= 2.0 to 3.6
= 2.7 to 3.6
= 2.0 to 3.6 V
= 2.2 to 3.6 V
PD70F3792, 70F3793)
200
400
100
400
Note 3 Note 4
MIN.
2.5
2.5
2.5
2.5
Note 5
Note 7
Note 5
Note 7
Note 6
Note 6
Note 6
Note 6
TYP.
SS
.
MAX.
2.5
10
5
5
MHz
MHz
MHz
MHz
Unit
ms
ms
μ
μ
s
s
s

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