UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 866

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
24.1 Overview
example, to stop operation at power-on until the supply voltage reaches the operation voltage level, or to initialize the
settings of the V850ES/JG3-L functions at any time.
864
The reset function is used to initialize the settings of the V850ES/JG3-L functions. This function is used, for
The V850ES/JG3-L starts operating at address 00000000H immediately after a reset ends.
The following sources cause a reset:
(1) Four reset sources
(2) Emergency operation mode
• External reset input via the RESET pin
• Reset via a watchdog timer 2 (WDT2) overflow (WDT2RES)
• System reset based on comparison of the low-voltage detector (LVI) supply voltage and detected voltage
• System reset based on detecting that oscillation of clock monitor (CLM) has stopped
The source of the reset can be confirmed by using the reset source flag register (RESF) immediately after a
reset ends.
If WDT2 overflows during the main clock oscillation stabilization time inserted after a reset, the main clock
oscillation is judged as abnormal and the CPU starts operating on the internal oscillator clock.
Caution In the emergency operation mode, do not access on-chip peripheral I/O registers other than
those for the interrupt function, port function, WDT2, and timer M, which can operate on the
internal oscillator clock. In addition, operating CSIB0 to CSIB4 and UARTA0 by using an
external clock is also prohibited.
CHAPTER 24 RESET FUNCTION
User’s Manual U18953EJ5V0UD

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