UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 577

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
16.6.8 SBF transmission
SBF transmission is started by setting the SBF transmission trigger (UAnOPT0.UAnSTT bit) to 1.
AnOPT0.UAnSLS0 bits, is output. A transmission enable interrupt request signal (INTUAnT) is generated upon the
start of SBF transmission. Following the end of SBF transmission, the UAnSTT bit is automatically cleared.
transmission trigger (UAnSTT bit) is set.
When the UAnCTL0.UAnPWR bit and UAnCTL0.UAnTXE bit are 1, the transmission enabled status is entered, and
Thereafter, a low level signal having a length of 13 to 20 bits, as specified by the UAnOPT0.UAnSLS2 to
Transmission is suspended until the data to be transmitted next is written to the UAnTX register, or until the SBF
TXDAn
INTUAnT
interrupt
Setting of UAnSTT bit
CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
1
Figure 16-13. Example of SBF Transmission
2
3
User’s Manual U18953EJ5V0UD
4
5
6
7
8
9
10
11
12
13
Stop
bit
575

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