UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 817

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(1) External interrupt falling, rising edge specification register 0 (INTF0, INTR0)
Remark
The INTF0 and INTR0 registers are 8-bit registers that specify detection of the falling and rising edges of the
NMI pin via bit 2 and the external interrupt pins (INTP0 to INTP3) via bits 3 to 6.
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Caution Be sure to clear the INTF0n and INTR0n bits to 00 when these registers are not used for the
Remark
Caution When switching from the port function to the external interrupt function (alternate function),
INTF0n
For how to specify a valid edge, see Table 21-4.
INTR0
0
0
1
1
INTF0
After reset: 00H
NMI or INTP0 to INTP3 pins.
n = 2:
n = 3 to 6: Control of INTP0 to INTP3 pins
an edge might be detected. Therefore, set the INTF0n and INTR0n bits to 00, and then specify
the external interrupt function (PMC0.PMC0n bit = 1).
When switching from the external interrupt function to the port function, an edge might be
detected as well. Therefore, set the INTF0n and INTR0n bits to 00, and then specify the port
function (PMC0.PMC0n bit = 0).
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
INTR0n
Control of NMI pin
0
0
0
1
0
1
R/W
INTF06
INTR06
INTP3
INTP3
Table 21-4. Valid Edge Specification
No edge detected
Rising edge
Falling edge
Both rising and falling edges
Address: INTF0 FFFFFC00H, INTR0 FFFFFC20H
INTF05
INTP2
INTR05
INTP2
User’s Manual U18953EJ5V0UD
INTF04
INTR04
INTP1
INTP1
Valid Edge Specification (n = 2 to 6)
INTF03
INTR03
INTP0
INTP0
INTF02
INTR02
NMI
NMI
0
0
0
0
815

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