UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 780

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.13 Cautions
778
(1) VSWC register
(2) DMA transfer executed for internal RAM
(3) Reading DCHCn.TCn bit (n = 0 to 3)
When using the DMAC, be sure to specify an appropriate value for the VSWC register, in accordance with the
operating frequency.
If an inappropriate value is specified for the VSWC register, the DMAC does not operate correctly (for details
about the VSWC register, refer to 3.4.8 (1) (a) System wait control register (VSWC)).
When a data access instruction located in the internal RAM is executed for a misaligned address, do not
execute the instruction via DMA to transfer data to/from the internal RAM, because the CPU may not operate
correctly afterward.
Similarly, when executing a DMA transfer to transfer data to/from the internal RAM, do not execute a data
access instruction located in the internal RAM for a misaligned address.
The TCn bit is cleared to 0 when it is read, but not if read at a specific time. To definitely clear the TCn bit, add
the following processing.
(a) When waiting for completion of DMA transfer by polling TCn bit
(b) When reading TCn bit in interrupt service routine
Confirm that the TCn bit has been set to 1 (after TCn bit = 1 is read), and then read the TCn bit three more
times.
Read the TCn bit three times.
CHAPTER 20 DMA FUNCTION (DMA CONTROLLER)
User’s Manual U18953EJ5V0UD

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