UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 529

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) Continuous select mode
(2) Continuous scan mode
comparison value
A/D conversion
In this mode, the result of converting the voltage of the analog input pin specified by the ADA0S register is
compared with the set value of the ADA0PFT register. If the result of power-fail comparison matches the
condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CRn register, and the INTAD
signal is generated. If it does not match, the conversion result is stored in the ADA0CRn register, and the
INTAD signal is not generated. After completion of the first conversion, the next conversion is started, unless
the ADA0M0.ADA0CE bit is cleared to 0 (n = 0 to 11).
In this mode, the results of converting the voltages of the analog input pins, from the ANI0 pin to the pin
specified by the ADA0S register, are stored sequentially.
First, the conversion result of channel 0 is compared. If the result of power-fail comparison matches the
condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register, and the INTAD
signal is generated. If it does not match, the conversion result is stored in the ADA0CR0 register, and the
INTAD signal is not generated.
After the result of the first conversion has been stored in the ADA0CR0 register, the results of sequentially
converting the voltages of the analog input pins up to the pin specified by the ADA0S register are continuously
stored. After completion of conversion, the next conversion is started from the ANI0 pin again, unless the
ADA0CE bit is cleared to 0.
Remark
(When Power-Fail Comparison Is Made: ADA0PFM.ADA0PFC bit = 0, ADA0S Register = 01H)
ADA0CR1
Power-fail
INTAD
ANI1
The above timing applies to the software trigger mode (ADA0M0.AD0TMD bit = 0) or the high-
speed conversion mode (ADA0M1.ADA0HS1 bit = 1).
Conversion start
Set ADA0CE bit to 1
Figure 14-8. Example of Timing in Continuous Select Mode
Data
(ANI1)
Data
1
CHAPTER 14 A/D CONVERTER
1
ADA0PFT
mismatch
User’s Manual U18953EJ5V0UD
Data
(ANI1)
Data
(ANI1)
Data
1
2
2
ADA0PFT
mismatch
Data
(ANI1)
Data
Data
(ANI1)
2
3
3
ADA0PFT
match
Data
(ANI1)
Data
Data
(ANI1)
3
4
4
ADA0PFT
match
Data
Data 5
(ANI1)
Conversion end
Set ADA0CE bit to 0
5
Data
(ANI1)
4
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