UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 599

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Remark
UC0CL
(6) UARTC0 status register (UC0STR)
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
The UC0STR register is an 8-bit register that displays the UARTC0 transfer status and reception error contents.
This register can be read or written in 8-bit or 1-bit units, but the UC0TSF bit is a read-only bit, while the
UC0PE, UC0FE, and UC0OVE bits can be both read and written. However, these bits can only be cleared by
writing 0; they cannot be set by writing 1 (even if 1 is written to them, the previous value is retained).
The conditions for clearing the UC0STR register are shown below.
Data: Data bit
Stop: Stop bit
Parity: Parity bit
UC0PS1
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC) (
UC0STR register
UC0TSF bit
UC0PE, UC0FE, UC0OVE bits
0
0
0
0
0
0
0
0
Other than 00
Other than 00
Other than 00
Other than 00
Other than 00
Other than 00
Other than 00
Other than 00
UC0CTL0
Register Setting
Table 17-2. Relationship Between Register Setting and Data Format
UC0PS0
0
0
0
0
0
0
0
0
Register/Bit
Table 17-3. Conditions for Clearing STR Register
UC0SL
0
1
0
1
User’s Manual U18953EJ5V0UD
UC0OPT1
UC0EBE
0
0
1
1
• Reset
• UC0CTL0.UC0PWR = 0
• UC0CTL0.UC0TXE = 0
• 0 write
• UC0CTL0.UC0RXE = 0
D0 to D6
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Conditions for Clearing
Parity
Parity
Parity
Parity
Stop
Data
Data
Stop
Data
Data
Stop
Data
Data
Stop
Data
Data
D7
Data Format
PD70F3792, 70F3793)
Parity
Parity
Parity
Parity
Stop
Stop
Stop
Stop
Stop
Stop
Data
Stop
Stop
Data
D8
Stop
Stop
Stop
Stop
Stop
Stop
Stop
Stop
Stop
D9
Stop
Stop
Stop
D10
597

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