UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 202

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.6.4
Address wait insertion is set for each memory block area (memory blocks 0 to 3).
address-hold wait is inserted, it seems that the low-clock period of the T1 state is extended by 1 clock.
200
Address-setup or address-hold waits to be inserted in each bus cycle can be set by using the AWC register.
If an address-setup wait is inserted, it seems that the high-clock period of the T1 state is extended by 1 clock. If an
(1) Address wait control register (AWC)
This register can be read or written in 16-bit units.
Reset sets this register to FFFFH.
Cautions 1. The internal ROM, internal RAM, and on-chip peripheral I/O areas are not subject to
Programmable address wait function
Memory
block n signal
2. Write the AWC register after reset, and then do not change the set values. Also, when
After reset: FFFFH
AWC
address-setup wait or address-hold wait insertion.
changing the initial values of the AWC register, do not access an external memory area
until the settings are complete.
Caution Be sure to set bits 15 to 8 to “1”.
AHW3
AHWn
ASWn
Memory block 3
15
1
0
1
0
1
7
Not inserted
Inserted
Not inserted
Inserted
ASW3
14
1
6
CHAPTER 5 BUS CONTROL FUNCTION
Specifies insertion of address-setup wait (n = 0 to 3)
R/W
Specifies insertion of address-hold wait (n = 0 to 3)
AHW2
User’s Manual U18953EJ5V0UD
Memory block 2
Address: FFFFF488H
13
1
5
ASW2
12
1
4
AHW1
Memory block 1
11
1
3
ASW1
10
1
2
AHW0
Memory block 0
1
9
1
ASW0
1
8
0