UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 368

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
increments each time the valid edge of the external event count input is detected, and the value of the TQ0CCR0
register is transferred to the CCR0 buffer register.
0000H, and a compare match interrupt request signal (INTTQ0CC0) is generated.
the specified number of times (that is, the value of the TQ0CCR0 register + 1).
366
(CCR0 buffer register)
When the TQ0CE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H. The counter
When the value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is cleared to
The INTTQ0CC0 signal is generated each time the valid edge of the external event count input has been detected
INTTQ0CC0 signal
TQ0CCR0 register
16-bit counter
TQ0CE bit
Remark
FFFFH
0000H
Figure 8-18. Basic Timing of Operations in External Event Count Mode
This figure shows the basic timing when the rising edge is specified as the valid edge of the
external event count input.
External
event
count
interval
(D
0
D
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
+ 1)
0
External
event
count
interval
(D
D
0
D
+ 1)
0
0
User’s Manual U18953EJ5V0UD
External
event
count
interval
(D
0
D
+ 1)
0
External event count input
(CCR0 buffer register)
TQ0CCR0 register
NTTQ0CC0 signal
(TIQ00 pin input)
16-bit counter
D
0
− 1
D
D
0
0
0000
0001

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