UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 222

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
220
(2) Internal oscillator mode register (RCM)
(3) CPU operation clock status register (CCLS)
Cautions 1. The internal oscillator cannot be stopped while the CPU is operating on the
The RCM register is an 8-bit register that sets the operation mode of the internal oscillator.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The CCLS register indicates the status of the CPU operation clock.
This register is read-only, in 8-bit or 1-bit units.
Reset sets this register to 00H.
Note If a WDT overflow occurs during oscillation stabilization after a reset is released or STOP mode is
2. The internal oscillator oscillates if a watchdog timer overflow occurs while
3. The settings of the RCM register are valid by setting the option byte only in
released, the CCLSF bit is set to 1 and the reset value is 01H.
CCLS
After reset: 00H
RCM
After reset:
internal oscillator clock (CCLS.CCLSF bit = 1). Do not set the RSTOP bit to 1.
the oscillator signal is stabilizing after STOP mode has been canceled by the
occurrence of an interrupt (that is, if the CCLS.CCLSF bit is set to 1), even if
the internal oscillator is stopped (the RSTOP bit is 1). At this time, RSTOP
remains set to 1.
the
μ
PD70F3792 and 70F3793 . For details, see CHAPTER 29 OPTION BYTE.
RSTOP
CCLSF
00H
0
0
1
0
0
1
Note
Do not stop internal oscillator oscillation
Stop internal oscillator
Operating on main clock (f
Operating on internal oscillator clock (f
R/W
0
0
R
CHAPTER 6 CLOCK GENERATOR
Address: FFFFF80CH
Address: FFFFF82EH
User’s Manual U18953EJ5V0UD
0
0
Oscillation/stop of internal oscillator
CPU operation clock status
0
0
X
) or subclock (f
0
0
R
).
XT
).
0
0
0
0
RSTOP
CCLSF
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