UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 773

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.8 Time Related to DMA Transfer
shown below.
<1> DMA request response time
<2> Memory access
The time required to respond to a DMA request, and the minimum number of clocks required for DMA transfer are
Notes 1. One clock is always inserted between a read cycle and a write cycle in DMA transfer.
Single transfer: DMA response time (<1>) + Transfer source memory access (<2>) + 1
2. If an external interrupt (INTPn) is specified as the trigger to start DMA transfer, noise elimination time is
3. Transfer must be executed twice when transferring 16-bit data using the 8-bit bus.
4. More wait cycles may be necessary for accessing a special register described in 3.4.9 (1).
added (n = 0 to 7).
destination memory access (<2>)
DMA Cycle
External memory access
Internal RAM access
Peripheral I/O register access
Table 20-4. Number of Execution Clocks During DMA Cycle
CHAPTER 20 DMA FUNCTION (DMA CONTROLLER)
User’s Manual U18953EJ5V0UD
4 clocks (MIN.) + Noise elimination time
Depends on connected memory
2 clocks
3 clocks + Number of wait cycles specified by VSWC register
Number of Execution Clocks
Note 3
.
Note 2
Note 1
+ Transfer
Note 4
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