UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 399

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Using one-shot pulse mode
(a) Rewriting the TQ0CCRm register
When rewriting the value of the TQ0CCRm register to a smaller value, stop counting first and then change
the set value.
When changing the value of the TQ0CCR0 register from D
from D
be output as expected.
Condition 1 When rewriting the TQ0CCR0 register, if:
In the case of condition 1, the 16-bit counter will not be cleared and will overflow in the cycle in which the
new value is being written. The counter will be cleared for the first time at the newly written value (D
Condition 2 When rewriting the TQ0CCRk register, if:
In the case of condition 2, the TOQ0k pin output cannot be inverted to the active level in the cycle in which
the new value is being written.
An example of what happens when condition 1 and condition 2 are satisfied in the same cycle is shown in
Figure 8-42.
The 16-bit counter increments up to FFFFH, overflows, and starts incrementing again from 0000H.
When the 16-bit counter value matches D
output is set to the active level.
INTTQ0CC0 signal is generated, the TOQ0k pin output is set to the inactive level, and the counter stops
incrementing.
Remark
D
D
D
D
00
00
k0
k0
k0
> D
< 16-bit counter value < D
> D
< 16-bit counter value < D
to D
01
k1
m = 0 to 3
K = 1 to 3
or,
or,
k1
, if the registers are rewritten under any of the following conditions, a one-shot pulse will not
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
k1
01
User’s Manual U18953EJ5V0UD
Subsequently, when the 16-bit counter value matches D
k1
, the INTTQ0CCk signal is generated and the TOQ0k pin
00
to D
01
and the value of the TQ0CCRk register
01
01
).
, the
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