UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 381

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TQ0IOC2
(d) TMQ0 I/O control register 2 (TQ0IOC2)
(e) TMQ0 counter read buffer register (TQ0CNT)
(f) TMQ0 capture/compare registers 0 to 3 (TQ0CCR0 to TQ0CCR3)
The value of the 16-bit counter can be read by reading this register.
If the TQ0CCR0 register is set to D
to D
Remarks 1. TMQ0 I/O control register 1 (TQ0IOC1) and TMQ0 option register 0 (TQ0OPT0) are not
PWM waveform cycle = (D
Active level width of PWM waveform from TOQ01 pin = D
Active level width of PWM waveform from TOQ02 pin = D
Active level width of PWM waveform from TOQ03 pin = D
2
0
, and the TQ0CCR3 register is set to D
Figure 8-28. Register Settings in External Trigger Pulse Output Mode (3/3)
2. Updating TMQ0 capture/compare register 2 (TQ0CCR2) and TMQ0 capture/compare
used in the external trigger pulse output mode.
register 3 (TQ0CCR3) is enabled by writing to TMQ0 capture/compare register 1
(TQ0CCR1).
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0
0
+ 1) × Count clock cycle
0
User’s Manual U18953EJ5V0UD
0
, the TQ0CCR1 register is set to D
TQ0EES1
0
3
, the PWM waveform is as follows:
TQ0EES0 TQ0ETS1 TQ0ETS0
0
1
2
3
× Count clock cycle
× Count clock cycle
× Count clock cycle
0/1
0/1
1
, the TQ0CCR2 register is set
These bits select the
valid edge of the external
trigger input.
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