UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 748

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
746
Remarks 1. Conform the transmission and reception formats to the specifications of the product involved in
2. When using the V850ES/JG3-L as the master in a multimaster system, read the IICSn.MSTSn
3. When using the V850ES/JG3-L as the slave in a multimaster system, confirm the status using
4. n = 0 to 2
the communication.
bit for each INTIICn interrupt occurrence to confirm the arbitration result.
the IICSn and IICFn registers for each INTIICn interrupt occurrence to determine the next
processing.
No
No
EXCn = 1 or COIn = 1?
Not in communication
Transfer completed?
interrupt occurred?
interrupt occurred?
Figure 19-19. Master Operation in Multimaster System (3/3)
MSTSn = 1?
ACKDn = 1?
MSTSn = 1?
ACKDn = 1?
TRCn = 1?
WTIMn = 1
Restarted?
Write IICn
Write IICn
STTn = 1
INTIICn
INTIICn
C
C
1
2
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
Communication start
(address, transfer direction specification)
Transmission start
Waiting for ACK detection
Waiting for data transmission
User’s Manual U18953EJ5V0UD
Slave operation
CHAPTER 19 I
SPTn = 1
END
2
2
2
C BUS
WTIMn = WRELn = 1
Transfer completed?
interrupt occurred?
interrupt occurred?
MSTSn = 1?
MSTSn = 1?
ACKEn = 1
WTIMn = 0
WRELn = 1
ACKEn = 0
Read IICn
INTIICn
INTIICn
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
Waiting for ACK detection
Reception start
Waiting for data
transmission
2
2

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