UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 536

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

534
(4) Alternate I/O
(5) Interrupt request flag (ADIF)
A/D
The analog input pins (ANI0 to ANI11) function alternately as port pins. When selecting one of the ANI0 to
ANI11 pins to execute A/D conversion, do not execute an instruction to read an input port or write to an output
port during conversion as the conversion resolution may drop.
Also the conversion resolution may drop at the pins set as output port pins during A/D conversion if the output
current fluctuates due to the effect of the external circuit connected to the port pins.
If a digital pulse is applied to a pin adjacent to the pin whose input signal is being converted, the A/D
conversion value may not be as expected due to the influence of coupling noise. Therefore, do not apply a
pulse to a pin adjacent to the pin undergoing A/D conversion.
The interrupt request flag (ADIF) is not cleared (0) even if the contents of the ADA0S register are changed. If
the analog input pin is changed during A/D conversion, therefore, the result of converting the previously
selected analog input signal may be stored and the conversion end interrupt request flag may be set (1)
immediately before the ADA0S register is rewritten. If the ADIF flag is read immediately after the ADA0S
register is rewritten, the ADIF flag may be set (1) even though the A/D conversion of the newly selected analog
input pin has not been completed. When A/D conversion is stopped, clear (0) the ADIF flag before resuming
conversion.
Remark
conversion
ADA0CRn
INTAD
(ANIn conversion start)
ADA0S
n = 0 to 11
m = 0 to 11
Figure 14-13. Timing of Generating A/D Conversion End Interrupt Request
rewriting
ANIn
CHAPTER 14 A/D CONVERTER
User’s Manual U18953EJ5V0UD
(ANIm conversion start)
ANIn
ANIn
ADA0S
rewriting
ANIn
ANIm
ADIF is set, but ANIm
conversion does not end
ANIm
ANIm
ANIm