UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 293

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<1> Starting counting
(1) Operations in one-shot pulse output mode
(TPnCKS0 to TPnCKS2 bits)
Remark
External trigger input
INTTPnCC0 signal
INTTPnCC1 signal
Set up the registers
TPnCCR0 register
TPnCCR1 register
TPnCCR0 register
TPnCCR1 register
TPnCTL0 register
TPnCTL1 register
TOPn1 pin output
TPnIOC0 register
TPnIOC2 register
(TIPn0 pin input)
TPnCE bit = 1
16-bit counter
Figure 7-41. Timing and Processing of Operations in One-Shot Pulse Output Mode
START
TPnCE bit
a = 0, 1
n = 0 to 5
FFFFH
0000H
<1>
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Be sure to set up these
registers before setting
the TPnCE bit to 1.
Counting starts.
The TPnCKS0 to TPnCKS2
bits can be set here.
Waiting for trigger.
D
10
D
D
00
10
User’s Manual U18953EJ5V0UD
D
00
<2>
<2> Changing the TPnCCR0 and
<3> Stopping counting
TPnCCR1 register settings
Set the TPnCCR0 and TPnCCR1
D
11
D
D
01
11
D
01
TPnCE bit = 0
registers
STOP
<3>
Disables counting.
Because the TPnCCRa
register value will be
transferred to the CCRa
buffer register as soon
as the TPnCCRa register
is rewritten, it is
recommended to rewrite
the TPnCCRa register
immediately after the
INTTPnCCR0 signal is
generated.
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