UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 434

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
valid edge has been input to the TIQ0m pin, the value of the 16-bit counter is stored in the TQ0CCRm register, the 16-
bit counter is cleared to 0000H, and a capture interrupt request signal (INTTQ0CCm) is generated.
overflow interrupt request signal (INTTQ0OV) is generated at the next count clock, and the counter is cleared to
0000H and continues incrementing. At this time, the overflow flag (TQ0OPT0.TQ0OVF bit) is also set to 1. Clear the
overflow flag to 0 by executing the CLR1 software instruction.
432
When the TQ0CE bit is set to 1, the 16-bit counter starts incrementing. When it is subsequently detected that a
The pulse width is calculated as follows.
If a valid edge has not been input to the TIQ0m pin by the time the 16-bit counter has incremented up to FFFFH, an
If the overflow flag is set to 1, the pulse width can be calculated as follows.
Remark
Pulse width = Captured value × Count clock cycle
Pulse width = (10000H × Number of times the TQ0OVF bit was set (1) + Captured value) × Count clock cycle
INTTQ0CCm signal
TQ0CCRm register
INTTQ0OV signal
Remark
TIQ0m pin input
m = 0 to 3
16-bit counter
TQ0OVF bit
TQ0CE bit
Figure 8-66. Basic Timing of Operations in Pulse Width Measurement Mode
FFFFH
0000H
m = 0 to 3
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0000H
User’s Manual U18953EJ5V0UD
D
0
D
1
Cleared to 0 by
CLR1 instruction
D
2
D
3

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