UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 772

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.7 DMA Channel Priorities
that has the higher priority always takes precedence.
generated in a transfer cycle, DMA transfer on the channel with the lower priority is executed after the bus is released
to the CPU (the new transfer request for the same channel is ignored in the transfer cycle).
770
The DMA channel priorities are fixed as follows.
When the DMAC has released the bus, if another DMA transfer request that has a higher priority is issued, the one
If a new transfer request for the same channel and a transfer request for another channel with a lower priority are
The priorities are checked for every transfer cycle.
DMA0 transfer request
DMA1 transfer request
DMA2 transfer request
DMA3 transfer request
DMA channel 0 > DMA channel 1 > DMA channel 2 > DMA channel 3
If multiple DMA transfer requests are acknowledged at the same time, transfer is executed from the one with
the higher priority.
Note The CPU is using the bus, or the bus is unused.
Bus mastership
Note
Figure 20-3. Single Transfer (Using Multiple Channels)
Note
CHAPTER 20 DMA FUNCTION (DMA CONTROLLER)
DMA3
Note
User’s Manual U18953EJ5V0UD
DMA0 Note
DMA1
Note
DMA2
Note
DMA3
Note
Note
Note
Note