UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 294

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

292
(2) Using one-shot pulse mode
(a) Rewriting the TPnCCRa register
When rewriting the value of the TPnCCRa register to a smaller value, stop counting first and then change
the set value.
When changing the value of the TPnCCR0 register from D
from D
be output as expected.
Condition 1 When rewriting the TPnCCR0 register, if:
Condition 2 When rewriting the TPnCCR1 register, if:
An example of what happens when condition 1 and condition 2 are satisfied in the same cycle is shown in
Figure 7-42.
The 16-bit counter increments up to FFFFH, overflows, and starts incrementing again from 0000H.
When the 16-bit counter value matches D
is set to the active level. Subsequently, when the 16-bit counter value matches D
is generated, the TOPn1 pin output is set to the inactive level, and the counter stops incrementing.
Remark
D
D
D
D
In the case of condition 1, the 16-bit counter will not be cleared and will overflow in the cycle in which
the new value is being written. The counter will be cleared for the first time at the newly written value
(D
In the case of condition 2, the TOPn1 pin output cannot be inverted to the active level in the cycle in
which the new value is being written.
00
00
10
10
01
10
> D
< 16-bit counter value < D
> D
< 16-bit counter value < D
).
to D
01
11
n = 0 to 5
or,
or,
11
, if the registers are rewritten under any of the following conditions, a one-shot pulse will not
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
01
11
User’s Manual U18953EJ5V0UD
11
, the INTTPnCC1 signal is generated and the TOPn1 pin output
00
to D
01
and the value of the TPnCCR1 register
01
, the INTTPnCC0 signal