UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1014

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.16.1 Master operation in single master system
1012
Note Release the I
Remarks 1. For the transmission and reception formats, comply with the specifications of the communicating
communicating product. For example, when the EEPROM
the SCL0n pin to the output port and output clock pulses from that output port until the SDA0n pin
becomes constantly high level.
2. n = 0 to 3 (V850ES/JH3-E)
product.
n = 0 to 4 (V850ES/JJ3-E)
m = 0 to 2
2
C0n bus (SCL0n, SDA0n pins = high level) in compliance with the specifications of the
Figure 20-19. Master Operation in Single Master System
No
No
ACKEn = WTIMn = SPIEn = 1
Set STCENn, IICRSVn = 0
Transfer completed?
Initialize I
interrupt occurred?
interrupt occurred?
interrupt occurred?
OCKSm ← XXH
IICCLn ← XXH
SVAn ← XXH
IICCn ← XXH
STCENn = 1?
IICXn ← 0XH
IICFn ← 0XH
ACKDn = 1?
ACKDn = 1?
Restarted?
TRCn = 1?
Write IICn
Write IICn
Set ports
IICEn = 1
SPTn = 1
STTn = 1
INTIICn
INTIICn
INTIICn
START
2
C bus
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Note
User’s Manual U19601EJ2V0UD
Waiting for stop condition detection
Yes
No
No
No
No
No
No
Communication start preparation
(stop condition generation)
CHAPTER 20 I
Refer to Table 4-18 Using Port Pin as Alternate-Function Pin
to set the I
Transfer clock selection
Local address setting
Start condition setting
Communication start preparation
(start condition generation)
Communication start
(address, transfer direction specification)
Waiting for ACK detection
Transmission start
Waiting for data transmission
SPTn = 1
2
END
C mode before this function is used.
2
C BUS
TM
WTIMn = WRELn = 1
Transfer completed?
interrupt occurred?
interrupt occurred?
outputs a low level to the SDA0n pin, set
WRELn = 1
ACKEn = 1
WTIMn = 0
ACKEn = 0
Read IICn
INTIICn
INTIICn
Yes
Yes
Yes
No
No
No
Reception start
Waiting for
data reception
Waiting for ACK detection