UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 214

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
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<R>
5.6
cycle that is executed for each space selected by the chip select. By inserting an idle state, the data output float delay
time of the memory can be secured during read access (an idle state cannot be inserted during write access).
212
To facilitate interfacing with low-speed memories, one idle state (TI) can be inserted after the T3 state in the bus
Whether the idle state is to be inserted can be programmed by using the BCC register.
An idle state is inserted for all the areas immediately after system reset.
(1) Bus cycle control register (BCC)
Idle State Insertion Function
The BCC register can be read or written in 16-bit units.
Reset sets this register to AAAAH.
Cautions 1. The internal ROM, internal RAM, and on-chip peripheral I/O areas are not subject to idle
Notes1.
Caution Be sure to set bits 15, 13, 11 and 9 to “1”, and clear bits 14, 12, 10, 8, 6, 4, 2, and 0 to “0”.
2. It is recommended to clear the BC11 bit to 0.
After reset:
2. Write to the BCC register after reset, and then do not change the set values. Also, do not
V850ES/JJ3-E only. Be sure to set 1 in the V850ES/JH3-E.
BCC
state insertion.
access an external memory area until the initial settings of the BCC register are complete.
BC31
BCn1
CS3
15
AAAAH
1
0
1
7
Note1
Not inserted
Inserted
14
0
6
0
CHAPTER 5 BUS CONTROL FUNCTION
R/W
Specifies insertion of idle state (n = 0 to 3)
BC21
User’s Manual U19601EJ2V0UD
CS2
13
1
5
Address:
FFFFF48AH
12
0
4
0
BC11
11
1
3
Note2
10
0
0
2
BC01
CS0
1
9
1
0
0
0
8

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