UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1161

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Cautions 1. The TRQ bit should be set after the RDY bit is set.
Remark Check the MBON bit at the start and end of the interrupt routine to see if the message buffer and
2. The RDY bit and TRQ bit should not be set at the same time.
transmit history register can be accessed, because a CAN sleep mode transition request which has
been held pending may be under execution. If the MBON bit is cleared (0), stop the processing
under execution. Re-execute the processing after the MBON bit is set (1) again. It is therefore
recommended to cancel the CAN sleep mode transition request before executing transmission
interrupt servicing.
Set C0MDATAxm,
C0MDLCm registers.
Clear RTR bit of
C0MCONFm register.
Set C0MIDLm and
C0MIDHm registers.
Figure 21-43. Transmission via Interrupt (Using C0LOPT Register)
Data frame
CHAPTER 21 CAN CONTROLLER
User’s Manual U19601EJ2V0UD
Read C0LOPT register.
Transmit completion
Clear RDY bit = 1
interrupt servicing
Clear TRQ bit = 0
Clear RDY bit = 0
Set RDY bit = 0
Clear RDY bit.
remote frame?
Set RDY bit = 1
Set TRQ bit = 1
RDY bit = 0?
Data frame
Set RDY bit.
Set TRQ bit.
Start
END
or
Yes
No
Remote frame
Set C0MDLCm register.
Set RTR bit of
C0MCONFm register.
Set C0MIDLm and
C0MIDHm registers.
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