UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1689

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD70F3786GJ-GAE-AX
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UPD70F3786GJ-GAE-AX
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34.1 Debugging with DCU
chip debug emulator (MINICUBE).
34.1.1 Connection circuit example
34.1.2 Interface signals
Figure 34-1. Circuit Connection Example When Debug Interface Pins Are Used for Communication Interface
Programs can be debugged using the debug interface pins (DRST, DCK, DMS, DDI, and DDO) to connect the on-
Notes 1. Example of pin connection when MINICUBE is not connected
The interface signals are described below.
(1) DRST
This is a reset input signal for the on-chip debug unit. It is a negative-logic signal that asynchronously
initializes the debug control unit.
MINICUBE raises the DRST signal when it detects V
started, and starts the on-chip debug unit of the device.
When the DRST signal goes high, a reset signal is also generated in the CPU.
When starting debugging by starting the integrated debugger, a CPU reset is always generated.
2. A pull-down resistor is provided on chip.
3. For flash memory rewriting
MINICUBE
RESET
FLMD0
DRST
DMS
DDO
GND
VDD
DCK
DDI
CHAPTER 34 ON-CHIP DEBUG FUNCTION
User’s Manual U19601EJ2V0UD
Note 1
DD
of the target system after the integrated debugger is
EV
DCK
DMS
DDI
DDO
DRST
RESET
FLMD0
FLMD1/PDL5
V
SS
V850ES/JH3-E,
V850ES/JJ3-E
DD
Note 2
Note 3
1687

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