UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1448

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

1446
31
30
29
28
27
26
(5) RXERSEL: Receive error selection register
Bit
This register is used to select whether to receive or discard packets when a reception error occurs.
Access
Address
Default value 0000 0001H. This register is cleared to its default value by all types of resets.
Caution Be sure to set bits 25 to 23 and 15 to 2 to “0”.
RLENE
VLAN
USOP
RPCF
RCFR
DBNB
RLENE
R/W
31
23
15
Name
R
R
R
0
0
7
0
This register can be read and written in 32-bit units.
002E 0220H
RLOR
VLAN
Receive packet length error
VLAN packet reception
Undefined opcode control packet
Pause control packet
Control packet
R/W
R/W
0: Receive the packet.
1: Discard the packet.
0: Receive the packet.
1: Discard the packet.
0: Receive the packet.
1: Discard the packet.
0: Receive the packet.
1: Discard the packet.
0: Receive the packet.
1: Discard the packet.
Packet containing dribble nibble
0: Receive the packet.
1: Discard the packet.
30
22
14
R
R
0
6
0
USOP
RLER
CHAPTER 23 ETHERNET CONTROLLER
R/W
R/W
29
21
13
R
R
0
5
0
User’s Manual U19601EJ2V0UD
RCRCE
RPCF
R/W
R/W
28
20
12
R
R
0
4
0
RCFR
RXER
R/W
R/W
27
19
11
R
R
0
3
0
Description
DBNB
CEPS
R/W
R/W
26
18
10
R
R
0
2
0
REPS
TXRX
R/W
R/W
25
17
R
R
0
9
0
1
DVCF
PAIG
R/W
R/W
24
16
R
R
0
8
0
0
(1/2)