UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 726

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

724
(3) One-shot select mode
(4) One-shot scan mode
A/D
In this mode, the result of converting the voltage of the analog input pin specified by the ADA0S register is
compared with the set value of the ADA0PFT register. If the result of power-fail comparison matches the
condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CRn register, and the INTAD
signal is generated. If it does not match, the conversion result is stored in the ADA0CRn register, and the
INTAD signal is not generated. Conversion is stopped after it has been completed.
In this mode, the results of converting the voltages of the analog input pins sequentially selected from the ANI0
pin to the pin specified by the ADA0S register are stored, and the set value of the ADA0CR0H register of
channel 0 is compared with the set value of the ADA0PFT register. If the result of power-fail comparison
matches the condition set by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and the
INTAD signal is generated. If it does not match, the conversion result is stored in the ADA0CR0 register, and
the INTAD0 signal is not generated. After the result of the first conversion has been stored in the ADA0CR0
register, the results of converting the signals on the analog input pins specified by the ADA0S register are
sequentially stored. The conversion is stopped after it has been completed.
conversion
ADA0CR1
INTAD
ANI1
Conversion start
Set ADA0CE bit = 1
Figure 15-10. Timing Example of One-Shot Select Mode Operation
(When Power-Fail Comparison Is Made: ADA0S Register = 01H)
Data
Data 1
(ANI1)
1
ADA0PFT
Conversion end
CHAPTER 15 A/D CONVERTER
Data 1
(ANI1)
User’s Manual U19601EJ2V0UD
Data
unmatch
2
Data
3
Data
4
Data
Conversion start
Set ADA0CE bit = 1
5
Data
Data 6
(ANI1)
ADA0PFT match
6
Conversion end
Data 6
(ANI1)
Data
7