UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 361

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(6) TABn I/O control register 4 (TABnIOC4)
The TABnIOC4 register is an 8-bit register that controls the timer output.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H. This register is not reset by stopping the timer operation (TABnCTL0.TABnCE
= 0).
Cautions 1. Accessing the TABnIOC4 register is prohibited in the following statuses. For details, see
TABnIOC4
(n = 0, 1)
2. The TABnIOC4 register can be set only in the interval timer mode and free-running timer
After reset: 00H
3.4.9 (2) Accessing specific on-chip peripheral I/O registers.
• When the CPU operates on the subclock and the main clock oscillation is stopped
• When the CPU operates on the internal oscillation clock
mode. Be sure to set the TABnIOC4 register to 00H in all other modes (for details of the
mode setting, see 8.4 (2) TABn control register 1 (TABnCTL1)). Even in free-running timer
mode, if the TABnCCR0 to TABnCCR3 registers are set to the capture function, the setting
of the TABnIOC4 register becomes invalid.
Note The TOAB03 pin is not provided in the V850ES/JH3-E.
TABnOS3
TABnOSm
7
0
0
1
1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Note
TAB0OS3 and TAB0OR3 bits to 0.
TABnOR3
TABnORm
R/W
6
0
1
0
1
Note
Address:
No request. Normal toggle operation.
Reset request
Fix to inactive level upon next match between value of 16-bit
counter and value of TAAnCCRm register.
Set request
Fix to active level upon next match between value of 16-bit
counter and value of TAAnCCRm register.
Keep request
Keep the current output level.
User’s Manual U19601EJ2V0UD
TABnOS2 TABnOR2 TABnOS1 TABnOR1 TABnOS0 TABnOR0
5
Toggle control of TOABnm pin (m = 0 to 3)
TAB0IOC4 FFFFF550H, TAB1IOC4 FFFFF570H
4
3
2
1
Set the
0
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