UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 407

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TABnIOC0
TABnIOC2
• When TABnOLk bit = 0
(c) TABn I/O control register 0 (TABnIOC0)
(d) TABn I/O control register 2 (TABnIOC2)
(e) TABn counter read buffer register (TABnCNT)
TOABnk pin output
The value of the 16-bit counter can be read by reading the TABnCNT register.
Notes 1. The TIAB03 pin is not provided in the V850ES/JH3-E. Set the TAB0OL3 and TAB0OE3 bits
Remark
TABnOL3
0/1
16-bit counter
Figure 8-22. Register Setting for Operation in One-Shot Pulse Output Mode (2/3)
Note 1
0
2. Clear this bit to 0 when the TOABn0 pin is not used in the one-shot pulse output mode.
to 0.
n = 0, 1
TABnOE3 TABnOL2 TABnOE2
0/1
Note 1
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
0/1
0
0/1
User’s Manual U19601EJ2V0UD
0
TABnOL1
TABnEES1
0/1
0/1
TABnOE1 TABnOL0 TABnOE0
TABnEES0
• When TABnOLk bit = 1
0/1
TOABnk pin output
0/1
16-bit counter
0/1
TABnETS1 TABnETS0
Note 2
0/1
0/1
Note 2
0/1
0: Disable TOABn0 pin output
1: Enable TOABn0 pin output
Setting of output level while
operation of TOABn0 pin is disabled
0: Low level
1: High level
0: Disable TOABn1 pin output
1: Enable TOABn1 pin output
Specification of active level
of TOABn1 pin output
0: Active-high
1: Active-low
Specification of active level
of TOABn2 pin output
0: Active-high
1: Active-low
0: Disable TOABn3 pin output
1: Enable TOABn3 pin output
0: Disable TOABn2 pin output
1: Enable TOABn2 pin output
Specification of active level
of TOABn3 pin output
0: Active-high
1: Active-low
Select valid edge of
external trigger input
Select valid edge of
external event count input
405