MC68EC000 Motorola, MC68EC000 Datasheet - Page 106

• Manufacturer Part Number: MC68EC000
• Description: Core Processor (SCM 68000)
• Manufacturer: Motorola

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Exception Processing
4.3.3 Instruction Traps
Traps are exceptions caused by instructions. Traps occur when the SCM68000 recognizes
an abnormal condition during instruction execution or when an instruction that normally
causes exception processing is executed.
Exception processing for traps is straightforward. The status register is copied; the supervi-
sor mode is entered; and tracing is turned off. The vector number is internally generated; for
the TRAP instruction, part of the vector number comes from the instruction itself. The pro-
gram counter and the copy of the status register are saved on the supervisor stack. The
saved value of the program counter is the address of the instruction following the instruction
that generated the trap. Finally, instruction execution commences at the address in the
exception vector.
Some instructions are used specifically to generate traps. The TRAP instruction always
forces an exception and is useful for implementing system calls for user programs. The
TRAPV and CHK instructions force an exception if the user program detects a run-time
error, which may be an arithmetic overflow or a subscript out of bounds.
A signed divide (DIVS) or unsigned divide (DIVU) instruction forces an exception if a division
operation is attempted with a divisor of zero.
4.3.4 Illegal and Unimplemented Instructions
Illegal instruction is the term used to refer to any of the word bit patterns that do not match
a legal SCM68000 instruction. If such an instruction is fetched, an illegal instruction excep-
tion occurs. Motorola reserves the right to define instructions using the opcodes of any of
the illegal instructions. Three bit patterns always force an illegal instruction trap: $4AFA,
$4AFB, and $4AFC. Two of the patterns, $4AFA and $4AFB, are reserved for Motorola sys-
tem products. The third pattern, $4AFC, is reserved for customer use (as the take illegal
instruction trap (ILLEGAL ) instruction).
Word patterns with bits 15–12 equaling 1010 or 1111 are distinguished as unimplemented
instructions, and separate exception vectors are assigned to these patterns to permit effi-
cient emulation. These vectors allow the operating system to emulate unimplemented
instructions in software.
Exception processing for illegal instructions is similar to that of traps. After the instruction is
fetched and decoding is attempted, the SCM68000 determines that execution of an illegal
instruction is being attempted and starts exception processing. The exception stack frame
for group 2 (see Table 4-3 for more information on exception groups) is then pushed on the
supervisor stack, and the illegal instruction vector is fetched.
4.3.5 Privilege Violations
To provide system security, various instructions are privileged. An attempt to execute one
of the privileged instructions while in the user mode causes an exception. The privileged
instructions can be found in Chapter 6 of the M68000 Family Programmer’s Reference Man-
ual (M68000PM/AD).
MOTOROLA
EC000 CORE PROCESSOR USER’S MANUAL
4-21
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