MC68EC000 Motorola, MC68EC000 Datasheet - Page 37

• Manufacturer Part Number: MC68EC000
• Description: Core Processor (SCM 68000)
• Manufacturer: Motorola

Signal Description
2.7.8 Autovector (AVECB)
This active-low input signal indicates that the SCM68000 should use automatic vectoring for
an interrupt during an interrupt acknowledge cycle. AVECB should be asserted only during
an interrupt acknowledge cycle or erratic controller operation may occur.
2.8 THREE-STATE CONTROL
The following signals are the enable signals to put SCM68000 signals into a high-impedence
state.
2.8.1 Address Output Enable (AOEB)
This active-low output signal is negated to put the address lines (A31–A0), function codes
(FC2–FC0), size codes (SIZ1–SIZ0), early read/write (ERWB), and read/write (RWB) into a
high-impedance state.
2.8.2 Control Output Enable (COEB)
This active-low output signal is negated to put the address strobe (ASB), data strobe (DSB),
lower data strobe (LDSB), read-modify-write (RMCB), and upper data strobe (UDSB) into a
high-impedance state.
2.8.3 Data Output Enable (DOEB)
This active-low output signal is negated to put the data lines of the SCM68000 into a high-
impedance state.
2.9 PROCESSOR STATUS
These signals are used to indicate pending interrupts and when the SCM68000 is between
bus cycles or at instruction boundaries. They also show when the instruction pipe is refilling
and when the processor has been stopped. The signals are described in the following para-
graphs.
2.9.1 Function Codes (FC2–FC0)
These active-high, three-state function code outputs indicate the mode (user or supervisor)
and the address space currently being accessed as listed in Table 2-6. The function code
outputs are valid whenever ASB is active.
2-8
High
High
High
High
FC2
Low
Low
Low
Low
Function Code Output
Freescale Semiconductor, Inc.
EC000 CORE PROCESSOR USER’S MANUAL
For More Information On This Product,
Table 2-6. Function Code Outputs
High
High
High
High
FC1
Low
Low
Low
Low
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High
High
High
High
FC0
Low
Low
Low
Low
(Undefined, Reserved)
User Data
User Program
(Undefined, Reserved)
(Undefined, Reserved)
Supervisor Data
Supervisor Program
Interrupt Acknowledge
Cycle Time
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