MC68EC000 Motorola, MC68EC000 Datasheet - Page 117

• Manufacturer Part Number: MC68EC000
• Description: Core Processor (SCM 68000)
• Manufacturer: Motorola

8-Bit Instruction Execution Times
The following notation applies in Table 5-12:
5.11 MISCELLANEAOUS INSTRUCTION EXECUTION TIMES
Table 5-13 and Table 5-14 list the timing data for miscellaneous instructions. The total num-
ber of clock periods, the number of read cycles, and the number of write cycles are shown
in the previously described format. The number of clock periods, the number of read cycles,
and the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
5-8
Dn — Data register operand
M — Memory operand
ANDI to CCR
ANDI to SR
EORI to CCR
EORI to SR
EXG
EXT
LINK
MOVE to CCR
MOVE to SR
MOVE from SR
MOVE to USP
MOVE from USP
NOP
ORI to CCR
ORI to SR
RESET
RTE
RTR
RTS
STOP
SWAP
UNLK
+ Add effective address calculation time for word operand.
Table 5-12. Multiprecision Instruction Execution Times
Table 5-13. Miscellaneous Instruction Execution Times
ADDX
CMPM
SUBX
ABCD
SBCD
Instruction
Instruction
Freescale Semiconductor, Inc.
EC000 CORE PROCESSOR USER’S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Word
Word
Word
Long
Long
Long
Size
Byte
Byte
Byte
Byte
Byte
Register
136(2/0)
40(10/0)
40(10/0)
32(6/0)
32(6/0)
32(6/0)
32(6/0)
10(2/0)
32(4/4)
18(4/0)
18(4/0)
10(2/0)
32(6/0)
32(6/0)
32(8/0)
24(6/0)
8(2/0)
8(2/0)
8(2/0)
8(2/0)
4(0/0)
8(2/0)
op Dn, Dn
12(2/0)
12(2/0)
10(2/0)
10(2/0)
8(2/0)
8(2/0)
8(2/0)
8(2/0)
—
—
—
Memory
op M, M
58(10/4)
40(10/0)
58(10/4)
18(4/0)+
18(4/0)+
16(2/2)+
22(4/1)
50(6/2)
16(4/0)
24(6/0)
22(4/1)
50(6/2)
20(4/1)
20(4/1)
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