MC68EC000 Motorola, MC68EC000 Datasheet - Page 86

• Manufacturer Part Number: MC68EC000
• Description: Core Processor (SCM 68000)
• Manufacturer: Motorola

Freescale Semiconductor, Inc.
SECTION 4
EXCEPTION PROCESSING
1
This section describes operations of the SCM68000 (EC000 core)
outside the normal pro-
cessing associated with the execution of instructions. The functions of the bits in the super-
visor portion of the status register are described: the supervisor/user bit, the trace enable
bit, and the interrupt priority mask. Finally, the sequence of memory references and actions
taken by the SCM68000 for exception conditions are described in detail.
The SCM68000 is always in one of three processing states: normal, exception, or halted.
The normal processing state is associated with instruction execution; the memory refer-
ences are to fetch instructions and operands and to store results. A special case of the nor-
mal state is the stopped state, resulting from the execution of a STOP instruction. In this
state, no further memory references are made.
The exception processing state is associated with interrupts, trap instructions, tracing, and
other exceptional conditions. The exception may be internally generated by an instruction or
by an unusual condition arising during the execution of an instruction. Externally, exception
processing can be forced by an interrupt, a bus error, or a reset. Exception processing pro-
vides an efficient context switch so that the SCM68000 can handle unusual conditions.
The halted processing state is an indication of catastrophic hardware failure. For example,
if during the exception processing of a bus error another bus error occurs, the SCM68000
assumes the system is unusable and halts. Only an external reset can restart the halted
SCM68000. Note that the stopped state is not the same as the halted state.
4.1 PRIVILEGE MODES
The SCM68000 operates in one of two levels of privilege: the supervisor mode or the user
mode. The privilege mode determines which operations are legal. The mode is optionally
used by an external memory management device to control and translate accesses. The
mode is also used to choose between the supervisor stack pointer (SSP) and the user stack
pointer (USP) in instruction references.
The privilege mode is a mechanism for providing security in a computer system. Programs
should access only their own code and data areas and should be restricted from accessing
information that they do not need and must not modify. The operating system executes in
the supervisor mode, allowing it to access all resources required to perform the overhead
tasks for the user mode programs. Most programs execute in user mode, in which the
accesses are controlled and the effects on other parts of the system are limited.
1.
The SCM68000 is the name of the Verilog model for the EC000 Core. The remainder of this section will
refer to the part as only the SCM68000
MOTOROLA
EC000 CORE PROCESSOR USER’S MANUAL
4-1
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