MC68EC000 Motorola, MC68EC000 Datasheet - Page 123

• Manufacturer Part Number: MC68EC000
• Description: Core Processor (SCM 68000)
• Manufacturer: Motorola

16-Bit Instruction Execution Times
6.4 IMMEDIATE INSTRUCTION EXECUTION TIMES
The numbers of clock periods listed in Table 6-5 include the times to fetch immediate oper-
ands, perform the operations, store the results, and read the next operation. The total num-
ber of clock periods, the number of read cycles, and the number of write cycles are shown
in the previously described format. The number of clock periods, the number of read cycles,
and the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
In Table 6-5, the following notation applies:
6-4
Dn — Data register operand
An — Address register operand
M — Memory operand
# — Immediate operand
ADD/ADDA
AND
CMP/CMPA
DIVS
DIVU
EOR
MULS
MULU
OR
SUB
+Add effective address calculation time.
†Word or long only.
*Indicates maximum basic value added to word effective address time.
**The base time of six clock periods is increased to eight if the effective address mode is register
direct or immediate (effective address time should also be added).
***Only available effective address mode is data register direct.
MULS, MULU—The multiply algorithm requires 38+2n clocks where n is defined as:
MULU: n = the number of ones in the <ea>
MULS: n=concatenate the <ea> with a zero as the LSB; n is the resultant number of 10 or 01
Instruction
patterns in the 17-bit source; i.e., worst case happens when the source is $5555.
Table 6-4. Standard Instruction Execution Times
Freescale Semiconductor, Inc.
EC000 CORE PROCESSOR USER’S MANUAL
Byte, Word
Byte, Word
Byte, Word
Byte, Word
Byte, Word
Byte, Word
For More Information On This Product,
Word
Word
Word
Word
Long
Long
Long
Long
Long
Long
Size
Go to: www.freescale.com
op<ea>, An†
6(1/0)+**
6(1/0)+**
8(1/0)+
6(1/0)+
6(1/0)+
8(1/0)+
—
—
—
—
—
—
—
—
—
—
op<ea>, Dn
158(1/0)+*
140(1/0)+*
70(1/0)+*
70(1/0)+*
6(1/0)+**
6(1/0)+**
6(1/0)+**
6(1/0)+**
4(1/0)***
8(1/0)***
4(1/0)+
4(1/0)+
4(1/0)+
6(1/0)+
4(1/0)+
4(1/0)+
op Dn, <M>
12(1/2)+
12(1/2)+
12(1/2)+
12(1/2)+
12(1/2)+
8(1/1)+
8(1/1)+
8(1/1)+
8(1/1)+
8(1/1)+
—
—
—
—
—
—
MOTOROLA