R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 134

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 101 of 723
Table 7.33
X: 0 or 1
Notes:
Register
Setting
Value
Bit
1.
2.
3.
4.
Pulled up by setting the PU07 bit in the PUR0 register to 1.
Output drive capacity high by setting the DRR07 bit in the DRR0 register to 1.
N-channel open-drain output by setting the SCKOS bit in the SSMR2 register to 1 (N-channel open-drain output).
N-channel open-drain output by setting the NODC bit in the U2SMR3 register to 1.
PD3_5
PD3
0
1
X
X
X
0
X
0
X
SSUIICSR ICCR1
Port P3_5/SCL/SSCK/TRCIOD/CLK2
IICSEL
0
1
0
1
1
0
0
0
1
0
1
0
1
0
1
ICE
X
0
X
0
1
X
X
X
0
X
0
X
0
X
0
SSCK output
Communication Unit (Refer to
between Communication
control
Table 25.4 Association
Modes and I/O Pins.)
Synchronous Serial
X
X
X
X
X
X
X
0
0
0
1
0
0
0
0
SSCK input
control
X
X
X
X
X
X
X
0
0
1
0
0
0
0
0
TRCIODSEL CLK2SEL
X
X
X
X
X
2
0
0
TRCPSR1
Other than
Other than
010b
010b
1
X
X
X
1
1
X
X
X
X
X
X
X
0
0
0
Other than
Other than
Other than
Other than
U2SR1
X
X
X
1
0
0
01b
01b
01b
01b
X
X
X
0
1
1
X X X
X X X
X X X
X X X
X X X
X X X
X X X
X X X
2 1 0
0 0 1
SMD
U2MR
CKDIR
X
X
X
X
X
X
X
1
0
Refer to Table
Refer to Table
7.53 TRCIOD
7.53 TRCIOD
Pin Setting
Pin Setting
Timer RC
Setting
X
X
X
X
X
X
X
Input port
Output port
SCL input/output
SSCK input
SSCK output
TRCIOD input
TRCIOD output
CLK2 input
CLK2 output
Function
7. I/O Ports
(1)
(2)
(2)
(1)
(2, 4)
(2, 3)
(1)
(2)
(2)

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