R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 330

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 297 of 723
19.7.3
Notes:
Table 19.14
j = A, B, C, or D
BFC, BFD: Bits in TRCMR register
Note:
TRCGRA
TRCGRB
TRCGRC
TRCGRD
TRCGRD
After Reset
1. These bits are enabled for the input capture function.
2. These bits are enabled when in PWM2 mode and bits TCEG1 to TCEG0 in the TRCCR2 register are set to 01b,
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Register
1. Do not set the TRCGRB and TRCGRC registers to the same value.
Address 0131h
10b, or 11b (TRCTRG trigger input enabled).
Symbol
DFTRG TRCTRG pin digital filter function select bit
Symbol
DFCK0 Clock select bits for digital filter function
DFCK1
Bit
(1)
(1)
DFC
DFD
DFA
DFB
Timer RC Digital Filter Function Select Register (TRCDF) in PWM2 Mode
DFCK1
BFC = 0
BFD = 0
BFD = 1
Functions of TRCGRj Register in PWM2 Mode
b7
0
Setting
TRCIOA pin digital filter function select bit
TRCIOB pin digital filter function select bit
TRCIOC pin digital filter function select bit
TRCIOD pin digital filter function select bit
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
DFCK0
b6
0
General register. Set the PWM period.
General register. Set the PWM output change point.
General register. Set the PWM output change point (wait time
after trigger).
Buffer register. Set the next PWM output change point. (Refer to
19.3.2 Buffer Operation.)
(Not used in PWM2 mode)
Bit Name
b5
0
DFTRG
b4
0
Register Function
(1, 2)
DFD
b3
0
(1)
(1)
(1)
(1)
(2)
0: Function is not used
1: Function is used
b7 b6
0 0: f32
0 1: f8
1 0: f1
1 1: Count source (clock selected by bits
DFC
TCK2 to TCK0 in the TRCCR1
register)
b2
0
DFB
b1
0
Function
DFA
b0
0
TRCIOB pin
TRCIOB pin
PWM2 Output Pin
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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