R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 230
R5F21346CNFP#U0
Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet
1.R5F21346CNFPU0.pdf
(759 pages)
Specifications of R5F21346CNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 197 of 723
15.2.3
Note:
15.2.4
Note:
15.2.5
15.2.6
b7 to b0 This register value is reloaded to the DTCCT register in repeat mode.
b7 to b0 These bits specify the number of times of DTC data transfers.
b15 to b0 These bits specify a transfer destination address for data transfer.
After Reset
1. When the DTCCT register is set to 00h, the number of transfer times is 256. Each time the DTC is activated, the
After Reset
1. Set the initial value for the DTCCT register.
After Reset
After Reset
b15 to b0
After Reset
After Reset
Bit
Bit
Address Refer to Table 15.4 Control Data Allocation Addresses.
Address Refer to Table 15.4 Control Data Allocation Addresses.
Address Refer to Table 15.4 Control Data Allocation Addresses.
Address Refer to Table 15.4 Control Data Allocation Addresses.
Bit
Bit
DTCCT register is decremented by 1.
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
Bit
Bit
Bit
Bit
Bit
Bit
DTC Transfer Count Register j (DTCCTj) (j = 0 to 23)
DTC Transfer Count Reload Register j (DTRLDj) (j = 0 to 23)
DTC Source Address Register j (DTSARj) (j = 0 to 23)
DTC Destination Address Register j (DTDARj) (j = 0 to 23)
These bits specify a transfer source address for data transfer.
b15
b15
b7
b7
b7
b7
—
—
—
—
—
—
X
X
X
X
X
X
b14
b14
b6
b6
b6
b6
—
—
—
—
—
—
X
X
X
X
X
X
b13
b13
b5
—
b5
—
b5
—
—
b5
—
—
X
X
X
X
X
X
Function
Function
Function
Function
b12
b12
b4
b4
b4
b4
—
—
—
—
—
—
X
X
X
X
X
X
b11
b11
b3
b3
b3
b3
—
—
—
—
—
—
X
X
X
X
X
X
b10
b10
b2
b2
b2
b2
—
—
—
—
—
—
X
X
X
X
X
X
b1
b1
b1
b9
b1
b9
—
—
—
—
—
—
X
X
X
X
X
X
0000h to FFFFh
0000h to FFFFh
00h to FFh
Setting Range
Setting Range
00h to FFh
Setting Range
b0
b0
b0
b8
b0
b8
—
—
—
—
—
—
X
Setting Range
X
X
X
X
X
(1)
(1)
15. DTC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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