R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 424
R5F21346CNFP#U0
Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet
1.R5F21346CNFPU0.pdf
(759 pages)
Specifications of R5F21346CNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 391 of 723
Figure 20.21
Bits TSTART0 and TSTART1
in TRDSTR register
TRDGRD0 register
TRDGRB0 register
TRDSR1 register
TRDSR0 register
TRDSR0 register
TRDIOD0 output
TRDIOC0 output
TRDIOB0 output
Count source
IMFA bit in
IMFB bit in
Value in TRDi register
UDF bit in
0000h
m+1
CMD0, CMD1: Bits in TRDFCR register
i = 0 or 1
The above applies under the following conditions:
Bits OLS1 and OLS0 in TRDFCR are set to 0 (initial output level “H”, active level “L” for normal-phase and counter-phase)
Operating Example of Complementary PWM Mode
m
n
p
Initial output “H”
Initial output “H”
Transfer (when bits CMD1 to CMD0 are set to 11b)
Active level “L”
n
n+1
n+1-p
m+2-p
n
p
m-p-n+1
phase active level
Set to 0 by a program
Width of normal-
(m-p-n+1) × 2
Set to 0 by a program
Dead
time
p
m: Value set in TRDGRA0 register
n: Value set in TRDGRB0 register
p: Value set in TRD0 register
Width of counter-phase active level
Transfer (when bits CMD1 to CMD0
are set to 10b)
Value in TRD0 register
n
Value in TRD1 register
Modify with a program
(n+1-p) × 2
Following data
Set to 0 by a program
n+1-p
FFFFh
Set to
20. Timer RD
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