R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 150

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 117 of 723
9.2
9.2.1
Notes:
After Reset
1. The CM05 bit stops the XIN clock when the high-speed on-chip oscillator mode or low-speed on-chip oscillator
2. During external clock input, only the clock oscillation buffer stops and clock input is acknowledged.
3. Only when the CM05 bit is set to 1 (XIN clock stops) and the CM13 bit in the CM1 register is set to 0 (P4_6 and
4. When the MCU enters stop mode, the CM06 bit is set to 1 (divide-by-8 mode).
5. The CM04 bit can be set to 1 by a program but cannot be set to 0.
6. To use the XCIN clock, set the CM04 bit to 1 and the XCSEL bit in the PINSR register to 1. Also, set ports P4_3
7. Set the CM07 bit to 1 (XCIN clock) from 0 after setting the CM04 bit to 1 (XCIN-XCOUT pin) and allowing XCIN
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0006h
mode is selected. This bit cannot be used to detect whether the XIN clock has stopped. To stop the XIN clock,
set the bits in the following order:
(a) Set bits OCD1 to OCD0 in the OCD register to 00b.
(b) Set the OCD2 bit to 1 (on-chip oscillator clock selected).
P4_7), P4_6 and P4_7 can be used as I/O ports.
and P4_4 as input ports without pull-up.
clock oscillation to stabilize.
Set the PRC0 bit in the PRCR register to 1 (write enabled) before rewriting the CM0 register.
Symbol
Registers
Symbol
CM02 Wait mode peripheral function clock
CM03 XCIN clock stop bit
CM04 Port/XCIN-XCOUT switch bit
CM05 XIN clock (XIN-XOUT) stop bit
CM06 CPU clock division select bit 0
CM07 XIN, XCIN clock select bit
Bit
—
—
System Clock Control Register 0 (CM0)
CM07
Reserved bits
stop bit
b7
0
CM06
b6
0
Bit Name
CM05
b5
1
(7)
(5)
(4)
CM04
(1, 3)
b4
0
Set to 0.
0: Peripheral function clock does not stop in wait mode
1: Peripheral function clock stops in wait mode
0: XCIN clock oscillates
1: XCIN clock stops
0: I/O ports P4_3 and P4_4
1: XCIN-XCOUT pin
0: XIN clock oscillates
1: XIN clock stops
0: Bits CM16 and CM17 in CM1 register enabled
1: Divide-by-8 mode
0: XIN clock
1: XCIN clock
CM03
b3
1
CM02
b2
0
(2)
(6)
Function
b1
—
0
9. Clock Generation Circuit
b0
—
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W