R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 454

• Manufacturer Part Number: R5F21346CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/34Cr

Specifications of R5F21346CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 43
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 421 of 723
Figure 21.2
21.2.5
Note:
After Reset
1. This bit is automatically modified while timer RE counts.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 011Ch
PM bit and H12_H24 bits: Bits in TRECR1 register
The above applies to the case when count starts from a.m. 0 on Sunday.
Symbol TSTART H12_H24
TREHR Register
Contents of PM bit
Contents in TREWK register
TREHR Register
Contents of PM bit
Contents in TREWK register
Contents of
Contents of
H12_H24 Operating mode select bit
TRERST Timer RE reset bit
TSTART Timer RE count start bit
TOENA TREO pin output enable bit
Symbol
TCSTF Timer RE count status flag
Bit
Timer RE Control Register 1 (TRECR1) in Real-Time Clock Mode
INT
PM
—
Definition of Time Representation
b7
0
H12_H24 bit = 1
H12_H24 bit = 0
H12_H24 bit = 1
H12_H24 bit = 0
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Interrupt request timing bit
A.m./p.m. bit
(24-hour mode)
(12-hour mode)
(24-hour mode)
(12-hour mode)
b6
0
Bit Name
18
0
0
6
19
1
1
7
000 (Sunday)
PM
b5
0
1 (p.m.)
20
2
2
8
21
3
3
9
TRERST
b4
0: Count stopped
1: Counting
0: Disable clock output
1: Enable clock output
Set to 1 in real-time clock mode.
When setting this bit to 0, after setting it to 1, the followings
will occur.
• Registers TRESEC, TREMIN, TREHR, TREWK, and
• Bits TCSTF, INT, PM, H12_H24, and TSTART in the
• The 8-bit counter is set to 00h and the 4-bit counter is set
When the H12_H24 bit is set to 0 (12-hour mode)
0: a.m.
1: p.m.
When the H12_H24 bit is set to 1 (24-hour mode), its value
is undefined.
0: 12-hour mode
1: 24-hour mode
0: Count stops
1: Count starts
22
10
4
4
0
TRECR2 are set to 00h.
TRECR1 register are set to 0.
to 0h.
Date changes
0 (a.m.)
23
11
5
5
6
6
0
0
INT
001 (Monday)
b3
0
0 (a.m.)
7
7
1
1
000 (Sunday)
8
8
2
2
TOENA
b2
0
9
9
3
3
Function
10
10
TCSTF
11
11
Noon
b1
0
12
0
13
1
⋅⋅⋅
⋅⋅⋅
⋅⋅⋅
⋅⋅⋅
b0
—
0
14
1 (p.m.)
2
15
3
(1)
16
4
21. Timer RE
17
5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R