R5F21346CNFP#U0 Renesas Electronics America, R5F21346CNFP#U0 Datasheet - Page 325

MCU 1KB FLASH 32K ROM 48-LQFP

R5F21346CNFP#U0

Manufacturer Part Number
R5F21346CNFP#U0
Description
MCU 1KB FLASH 32K ROM 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/34Cr
Datasheet

Specifications of R5F21346CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
43
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R5F21346CNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/34C Group
REJ09B0586-0100 Rev.1.00 Jan 13, 2010
Page 292 of 723
Figure 19.15
TRCGRB register
TRCGRB register
TRCMR register
TRCMR register
TRCSR register
TRCSR register
TRCSR register
TRCSR register
TRCIOB output
TRCIOB output
Operating Example of PWM Mode (Duty 0% and Duty 100%)
TSTART bit in
TSTART bit in
IMFA bit in
IMFB bit in
IMFA bit in
IMFB bit in
TRC register value
TRC register value
0000h
0000h
The above applies under the following conditions:
• The EB bit in the TRCOER register is set to 0 (output from TRCIOB enabled).
• The POLB bit in the TRCCR2 register is set to 0 (“L” active).
1
1
p
m
q
n
m
p
n
n
n
Rewritten by
a program
Set to 0 by a program
m
Set to 0 by a program
Rewritten by a program
If compare matches occur simultaneously with registers TRCGRA and
TRCGRB, the compare match with the TRCGRB register has priority.
TRCIOB output switches to “L”. (In other words, no change).
p (p>m)
Duty 100%
Duty 0%
TRCIOB output switches to “L” at compare match with the
TRCGRB register. (In other words, no change).
m: TRCGRA register setting value
p
TRCIOB output does not switch to “L” because
no compare match with the TRCGRB register
has occurred
Set to 0 by a program
Set to 0 by a program
q
19. Timer RC

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