S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 100

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Page 8
2 Initialization
2.1 Display Buffer Location
2.2 Register Values
S1D13705
X27A-G-002-02
Prior to doing anything else with the S1D13705 the controller must be initialized. Initial-
ization is the process of setting up the control registers to a known state in order to generate
proper display signals.
Before we can perform the initialization we have to know where to find the S1D13705
display memory and control registers.
The S1D13705 contains 80 kilobytes of internal display memory. External support logic
must be employed to decode the starting address for this display memory in CPU address
space. On the S5U13705B00x PC platform evaluation boards the address is usually fixed
at F00000h. Alternatively the address can be set to D0000h.
The control registers are located by adding 1FFE0h (128 Kb less 32 bytes) to the base
memory address. Thus, on the typical PC platform, we access control register 0 at address
F1FFE0h. Control register 5 would be located at address F1FFE5, etc.
This section describes the register settings and sequence of setting the registers. In addition
to these setting the Look-Up Table must be programmed with appropriate colors. Look-Up
Table setup is not covered here. See Section 4 on page 15 of this manual for Look-Up Table
programming details.
The following initialization, presented in table form, shows the sequences and values to set
the registers. The notes column comments the reason for the particular value being written.
This example writes to all the necessary registers. Initially, when the S1D13705 is powered
up, all registers, unless noted otherwise in the specification, are set to zero. This example
programs these registers to zero to establish a known state. In practice, it may be possible
to write to only a subset of the registers.
The example initializes a S1D13705 to control a panel with the following specifications:
• 320x240 color single passive LCD panel at 70Hz.
• Color Format 2, 8-bit data interface.
• 8 bit-per-pixel (256 colors).
• 6 MHz input clock (CLKI).
Epson Research and Development
Programming Notes and Examples
Vancouver Design Center
Issue Date: 01/02/13

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