S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 71

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
bits 7-4
bits 4-0
Hardware Functional Specification
Issue Date: 01/05/22
REG[17h] Look-Up Table Data Register
Address = 1FFF7h
REG[18h] GPIO Configuration Control Register
Address = 1FFF8h
LUT Data
Bit 3
n/a
LUT Data
Bit 2
n/a
Note
Note
Note
LUT Data Bits [3:0]
This register is used to read/write the RGB Look-Up Tables. This register accesses the
entry at the pointer controlled by the Look-Up Table Address Register (REG[15h]).
Accesses to the Look-Up Table Data Register automatically increment the pointer.
GPIO[4:0] Pin IO Configuration
These bits determine the direction of the GPIO[4:0] pins.
When the GPIOn Pin IO Configuration bit = 0, the corresponding GPIOn pin is configured
as an input. The input can be read at the GPIOn Status/Control Register bit. See REG[19h]
GPIO Status/Control Register.
When the GPIOn Pin IO Configuration bit = 1, the corresponding GPIOn pin is configured
as an output. The output can be controlled by writing the GPIOn Status/Control Register
bit.
The RGB data is inserted into the LUT after the Blue data is written, i.e. all three colors
must be written before the LUT is updated.
The RGB data is inserted into the LUT after the Blue data is written, i.e. all three colors
must be written before the LUT is updated.
These bits have no effect when the GPIOn pin is configured for a specific function (i.e.
as FPDAT[11:8] for TFT/D-TFD operation).
When configured as IO, all unused pins must be tied to IO V
LUT Data
Bit 1
n/a
GPIO4 Pin IO
Configuration
LUT Data
Bit 0
GPIO3 Pin IO
Configuration
n/a
GPIO2 Pin IO
Configuration
n/a
GPIO1 Pin IO
Configuration
DD
.
n/a
Read/Write
Read/Write
GPIO0 Pin IO
Configuration
X27A-A-001-09
S1D13705
n/a
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