S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 163

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
Programming Notes and Examples
Issue Date: 01/02/13
** Register 07h - FPLINE Start Position - not used by STN
*/
SET_REG(0x07, 0x00);
/*
** Register 08h - Horizontal Non-Display Period = (Reg[08] + 4) * 8
**
**
**
**
**
**
**
*/
SET_REG(0x08, 0x00);
/*
** Register 09h - FPFRAME Start Position - not used by STN
*/
SET_REG(0x09, 0x00);
/*
** Register 0Ah - Vertical Non-Display Register = 3 lines
**
**
*/
SET_REG(0x0A, 0x03);
/*
** Register 0Bh - MOD Rate - not used by this panel
*/
SET_REG(0x0B, 0x00);
/*
** Register 0Ch - Screen 1 Start Word Address LSB
** Register 0Dh - Screen 1 Start Word Address MSB
**
*/
SET_REG(0x0C, 0x00);
SET_REG(0x0D, 0x00);
/*
** Register 0Eh - Screen 2 Start Word Address LSB
** Register 0Fh - Screen 2 Start Word Address MSB
**
*/
SET_REG(0x0E, 0x00);
SET_REG(0x0F, 0x00);
SET_REG(0x10, 0x00); /* Screen1/Screen2 Start Address High bits. */
/*
** Register 11h - Memory Address Offset
**
**
**
*/
- HNDP and VNDP are calculated to achieve the
- Calculated in conjunction with register 08h (HNDP) to
- Used for setting memory to a width greater than the
- Start address should be set to 0
- Set this start address to 0 too
Frame Rate = ---------------------------
display size. Usually set to 0 during initialization
and programmed to desired value later.
desired frame rate according to:
achieve the desired frame rate.
(HDP + HNDP) * (VDP + VNDP)
PCLK
= (0+4) * 8 = 32 pels
X27A-G-002-02
S1D13705
Page 71