S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 332

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 12
2.4 MC68328 To S1D13705 Interface
2.4.1 Hardware Description
Using The MC68K #1 Host Bus Interface
S1D13705
X27A-G-007-04
Figure 2-1: Typical Implementation of MC68328 to S1D13705 Interface - MC68K #1
Note:
When connecting the S1D13705 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13705 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
The interface between the MC68328 and the S1D13705 can be implemented using either
the MC68K #1 or Generic #1 host bus interface of the S1D13705.
The MC68328 multiplexes dual functions on some of its bus control pins (specifically
UDS, LDS, and DTACK). In implementations where all of these pins are available for use
as bus control pins, then the S1D13705 interface is a straightforward implementation of the
“MC68K #1” host bus interface.
The following diagram shows a typical implementation of the MC68328 to S1D13705
using the MC68K #1 host bus interface. For further information on the MC68K #1 host bus
interface and AC Timing, refer to the S1D13705 Hardware Functional Specification,
document number X27A-A-001-xx.
MC68328
DTACK
A[16:0]
D[15:0]
UDS
LDS
CSB3
R/W
CLK0
AS
System RESET
Vcc
1K
Interfacing to the Motorola ‘Dragonball’ Family of Microprocessors
Vcc
Vcc
RD/WR#
WE0##
BS#
RD#
WE1#
AB0
AB[16:1]
WAIT#
BUSCLK
RESET#
DB[15:0]
CS#
S1D13705
Epson Research and Development
Vancouver Design Center
Issue Date: 01/02/13