S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 125
S1D13705
Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13705.pdf
(480 pages)
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Epson Research and Development
Vancouver Design Center
Programming Notes and Examples
Issue Date: 01/02/13
REG[0Eh] Screen 2 Display Start Address 0 (LSB)
REG[0Fh] Screen 2 Display Start Address 1 (MSB)
Start Addr Bit
Start Addr Bit
15
7
Start Addr Bit
Start Addr Bit
14
6
Screen 2 Start Address Registers
These three registers form the seventeen bit Screen 2 Start Address. Screen 2 is always
displayed immediately following the screen 1 data and will begin at the left-most pixel on
a line. Keep in mind that if the Screen 1 Vertical Size is equal to or greater than the physical
display then Screen 2 will not be shown.
In landscape mode these registers form the word offset to the first byte in display memory
to be displayed. Changing these registers by one will shift the display image 2 to 16 pixels,
depending on the current color depth.
The S1D13705 does not support split screen operation in portrait mode. Screen 2 will never
be used if portrait mode is selected.
Refer to Table 5-1: “Number of Pixels Panned Using Start Address” to see the minimum
number of pixels affected by a change of one to these registers
Screen 1 Start Address registers, REG[0C], REG[0D] and REG[10] are discussed in
Section 5.2.1 on page 28
Start Addr Bit
Start Addr Bit
13
5
Start Addr Bit
Start Addr Bit
12
4
Start Addr Bit
Start Addr Bit
11
3
Start Addr Bit
Start Addr Bit
10
2
Start Addr Bit
Start Addr Bit
1
9
Start Addr Bit
Start Addr Bit
X27A-G-002-02
S1D13705
0
8
Page 33
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