S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 136

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 44
S1D13705
X27A-G-002-02
Note
Example 7: Enable alternate portrait mode for a 320x240 panel at 4 bpp.
As in the previous example, before switching to portrait mode, display memory should be
cleared. Images in display memory are not rotated automatically by hardware and the
garbled image would be visible for a short period of time if video memory is not cleared.
1. Calculate and set the Screen 1 Start Word Address register.
2. Calculate the Line Byte Count.
3. Enable portrait mode.
4. Recalculate the frame rate dependents.
This example assumes the alternate portrait mode scheme. In this scheme, without touching
the Pixel Clock Select bits the PCLK value will be equal to CLK/2.
These examples don’t use the Pixel Clock Select bits. The ability to divide the PCLK value
down further than the default values was added to the S1D13705 to support hardware
portrait mode on very small panels.
The Pixel Clock value has changed so we must calculate horizontal and vertical non-display
times to reach the desired frame rate. Rather than perform the frame rate calculations here
I will refer the reader to the frame rate calculations in Frame Rate Calculation on page 9
and simply “arrive” at the following:
Horizontal Non-Display Period = 88h
Vertical Non-Display Period = 03h
Plugging the values into the frame rate calculations yields:
As we have to perform a frame rate calculation for this mode we need to know the fol-
lowing panel characteristics: 320x240 8-bit color to be run at 80 Hz with a 16 MHz in-
put clock.
OffsetBytes = (Width x BitsPerPixel / 8) - 1 = (240 x 4 / 8) - 1 = 119 = 0077h
Set Screen1 Display Start Word Address LSB (REG [0Ch]) to 77h and Screen1 Dis-
play Start Word Address MSB (REG[0Dh]) to 00h.
LineByteCount = Width x BitsPerPixel / 8 = 240 x 4 / 8 = 120 = 78h.
Set the Line Byte Count (REG[1C]) to 78h.
This example uses the alternate portrait mode scheme. We will not change the MCLK
Autoswitch or Pixel Clock Select settings.
Write C0h to the Portrait Mode register (REG[1Bh])
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Programming Notes and Examples
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Issue Date: 01/02/13