S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 437

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
3 S1D13705 Host Bus Interface
3.1 Host Bus Pin Connection
Interfacing to the Philips MIPS PR31500/PR31700 Processor
Issue Date: 01/02/13
This section is a summary of the host bus interface modes available on the S1D13705 that
would be used to interface to the PR31500/PR31700.
The S1D13705 implements a 16-bit interface to the host microprocessor which may operate
in one of several modes compatible with most of the popular embedded microprocessor
families. The interface modes used for the PR31500/PR31700 are:
• Generic #1 (Chip Select, plus individual Read Enable/Write Enable for each byte).
• Generic #2 (External Chip Select, shared Read/Write Enable for high byte, individual
The following table shows the functions of each host bus interface signal.
For details on configuration, refer to the S1D13705 Hardware Functional Specification,
document number X27A-A-001-xx.
Read/Write Enable for low byte).
Pin Names
S1D13705
Table 3-1: Host Bus Interface Pin Mapping
AB[15:1]
DB[15:0]
RD/WR#
RESET#
WAIT#
WE1#
WE0#
BCLK
RD#
AB0
CS#
BS#
External Decode
connect to V
Generic #1
RESET#
A[15:1]
D[15:0]
WAIT#
WE1#
WE0#
BCLK
RD1#
RD0#
A0
SS
connect to IO V
connect to IO V
External Decode
Generic #2
RESET#
A[15:1]
D[15:0]
WAIT#
BHE#
BCLK
WE#
RD#
A0
DD
DD
X27A-G-012-02
S1D13705
Page 9

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