S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 51

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
7.3.7 Single Color 8-Bit Panel Timing (Format 2)
VDP =
VNDP =
HDP =
HNDP =
Hardware Functional Specification
Issue Date: 01/05/22
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
DRDY (MOD)
DRDY (MOD)
FPDAT[7:0]
FPFRAME
Vertical Display Period
Vertical Non-Display Period
Horizontal Display Period
Horizontal Non-Display Period
FPLINE
FPLINE
FPSHIFT
FPDAT7
FPDAT6
FPDAT5
FPDAT4
FPDAT3
FPDAT2
FPDAT1
FPDAT0
Figure 7-18: Single Color 8-Bit Panel Timing (Format 2)
1-B1
1-B2
1-R1
1-G1
1-R2
1-G2
1-R3
1-G3
1-B5
1-B3
1-G4
1-R6
1-R4
1-B4
1-R5
1-G5
LINE1
1-G8
1-B8
1-G6
1-B6
1-R7
1-B7
1-R8
1-G7
LINE2
LINE3
= (REG[06h] bits 1-0, REG[05h] bits 7-0) + 1 Lines
= REG[0Ah] bits 5-0 Lines
= ((REG[04h] bits 6-0) + 1) x 8Ts
= (REG[08h] + 4) x 8Ts
LINE4
VDP
HDP
LINE479 LINE480
1-R640
1-B640
1-G638
1-B638
1-R639
1-G639
1-B639
1-G640
VNDP
HNDP
LINE1
LINE2
X27A-A-001-09
S1D13705
Page 45

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